Design and Development of a Next-Generation Medium-Voltage Architecture for AI Data Centre Infrastructure

Overview

The study starts from the claim that AI training load (deterministically oscillatory in the 0.1-10 Hz band, with a peak-to-mean ratio near 1.40 and campus-scale ramp rates of tens of MW/s) is a load class the incumbent LV distribution architecture was not designed to serve. For a 100 MW campus (Abu Dhabi, 50 °C ambient) it designs and sizes an architecture with dual 132/33 kV intakes, an SF6-free 33 kV ring main, distributed 20 MVA solid-state transformer blocks and 13.8 kV taken to the row, converted once by 1.5 MW row conversion units to a ±800 VDC bus, and evaluates it against a legacy 400 V design and an improved 415 V variant.

The analytical framework combines a stochastic AI load model, conductor economics, cascaded efficiency, IEC 60909 short circuit, storage sizing, IEC 60287 derating, a Markov availability model with β-factor common cause, and IEEE 1584 incident energy. The load model uses a 1.40 peak-to-mean ratio, tones at 0.35, 1.70 and 6.20 Hz, a rack ramp of about 480 kW/s for a 260 kW rack, and a coincidence factor kc = k∞ + (1 − k∞)N^−α with k∞ = 0.86 and α = 0.42.

Results: end-to-end efficiency rises from 80.28% to 90.26% (9.98 points); conductor mass falls by 97.1% and electrical footprint by 58.1%; expected annual downtime falls by 92.5% to 3.2 minutes (availability 0.999994); total demand distortion falls by 86.1% to 1.63%; worst-case incident energy falls from 48.6 to 6.4 cal/cm²; imposed grid ramp rate falls from 96 to 11.8 MW/s; annual average PUE falls from 1.42 to 1.11; and fifteen-year total cost of ownership falls by 32.4%, with capital cost also lower, contrary to the initial hypothesis.

Limits are significant: the work is single-author, not peer reviewed and rests on one modelled case, with author-chosen cost and reliability inputs, so results are indicative. Markov results are sensitive to how much physical and control separation is achieved (residual common cause at β = 0.05), and equipment maturity and standards for ±800 VDC are not yet settled.

Key points

1. End-to-end efficiency is reported to rise from 80.28% (legacy) to 90.26%, and modelled unmitigated campus ramp rate falls from 96 to 11.8 MW/s.
2. Markov availability: legacy architecture A at N = 0.995800 (2,207 min/yr), N+1 = 0.999350 (342 min/yr), 2N = 0.999919 (42.6 min/yr); proposed architecture C at 2N = 0.999974 (13.7 min/yr) and 2(N+1) + BESS = 0.999994 (3.2 min/yr).
3. Dominant failure modes: UPS module failure (A, N), UPS and static bypass (A, N+1), common cause on the LV board (A, 2N), and residual common cause at β = 0.05 for the best case, so results are sensitive to physical and control separation.
4. The highest incident energy in the legacy design was 48.6 cal/cm² at the 400 V main board; in the proposed design the worst case was 6.4 cal/cm² at the 33 kV switchboard (PPE category 2), with DC boundaries at 0.9-3.1 cal/cm².
5. Earthing: 33 kV transformer neutrals resistance-earthed to 400 A, 13.8 kV to 200 A; the ±800 V DC mid-point is high-resistance earthed to limit first-fault current below 10 A with insulation monitoring per IEC 61557-8, so a first pole fault alarms rather than trips.
6. AI training load model: 1.40 peak-to-mean ratio, tones at 0.35, 1.70 and 6.20 Hz, a rack ramp of about 480 kW/s for a 260 kW rack, and coincidence factor kc = k∞ + (1 − k∞)N^−α with k∞ = 0.86 and α = 0.42.
7. Conductor mass falls by 97.1%, electrical footprint by 58.1%, annual PUE from 1.42 to 1.11 and 15-year TCO by 32.4%.

Using it in design

• Make the 0.1-10 Hz oscillation, 1.40 peak-to-mean ratio and coincidence factor explicit inputs in the AI campus load model, and check storage and buffering against grid ramp limits.
• Present the MV-to-the-row, single-conversion ±800 VDC architecture as a scenario compared with legacy double-conversion UPS on the same load for efficiency, conductors, footprint, availability, incident energy and TCO, and label results indicative.
• Add high-resistance mid-point earthing and IEC 61557-8 insulation monitoring to the DC distribution template, with the first-fault current limit (10 A) and alarm-not-trip logic.
• Make the common-cause β factor an explicit input in availability calculations and show sensitivity to physical and control separation.

Who should read it

Designers and decision makers evaluating the electrical architecture from medium voltage to rack on very high-density AI campuses.

Document contents

1. I. Introduction
2. II. Related Work and Research Gap (MV distribution and solid-state transformation, direct-current distribution in facilities, the gap)
3. III. Electrical Characterisation of the AI Compute Load (stochastic load model, aggregation and coincidence)
4. IV. Proposed Medium-Voltage Architecture (design principles, topology, row power-conversion unit, earthing and hybrid storage, cascaded efficiency)
5. V. Analytical Framework (voltage regulation and conductor economics, short-circuit computation, tri-duty storage sizing, derating for a 50 °C ambient, availability and incident energy, design optimisation)
6. VI. Results and Comparative Evaluation (efficiency and loss, dynamic performance, power quality, reliability, safety, power usage effectiveness and cost, consolidated comparison)
7. VII. Discussion, Limitations and Compliance
8. VIII. Conclusion

Related standards

• IEC 60909
• IEEE 1584-2018
• IEEE 519-2022
• IEEE 493
• IEEE 3006.7
• IEC 60287
• IEC 61557-8
• IEC 62619
• NFPA 855

Read the document

Publication details

Authors

Mohammad Ali

Publisher

Springer Science and Business Media LLC (preprint)

Year

2026

Document language

English

Source type

Scientific

Access

Open licence — downloadable

DOI

10.21203/rs.3.rs-11196206/v1

Licence

CC BY 4.0 — share with attribution

Licence evidence

www.researchsquare.com

Citation