Necessary Considerations for Designing DC Architectures in Data Centers
Schneider Electric · Eric L. Brun, Malik Megdiche et al.
This paper gathers the engineering issues that appear when moving from AC double-conversion UPS designs to low-voltage DC distribution. It helps designers see the protection and earthing pitfalls before committing to a DC architecture.
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Overview
The paper examines where low-voltage DC (LVDC) distribution in a data centre departs from the familiar AC double-conversion UPS architecture. Topics include converter design, UPS bypass approach, isolation and earthing, DC fault modelling and protective device selection. It treats DC distribution not as a ready-made solution but as an architectural choice that requires every component to be reconsidered. Its approach is to work through example architectures, using a 380 V DC bus. An unregulated DC bus can float across a range of roughly 30 percent, while a regulated bus holds about plus or minus 1 percent. That difference directly sets the voltage window connected loads must tolerate and shapes how converter stages are designed.
The most striking finding concerns fault behaviour. Battery-fed DC faults have time constants of roughly 0.2 to 1 ms, whereas DC breaker tests under IEC 60947-2 use time constants of 5, 10 and 15 ms (for currents below 10 kA, 10 to 20 kA and above 20 kA respectively). The breaker's test condition may therefore not match the real fault, and protection selection has to account for that gap. The paper is a conceptual framework rather than a product selection guide; its numeric examples rest on one chosen architecture and do not transfer directly to every project. It still gives teams evaluating DC distribution a short, practical checklist of where assumptions inherited from the AC world stop holding.
The design takeaway is that DC distribution should not be treated as a small variant of existing AC practice. The bus voltage range, the fault time constant and the breaker test conditions must be assessed together, a separate protection study should accompany every DC architecture, and the DC fault time constant should be recorded as an explicit input to breaker selection. Offering the architecture only as an option for experienced users is therefore reasonable.
Key points
- An unregulated DC bus voltage can float within about a 30 percent range; regulated buses hold plus or minus 1 percent
- Battery-fed DC fault time constants are about 0.2-1 ms
- IEC 60947-2 DC breaker test time constants: 5 ms (below 10 kA), 10 ms (10-20 kA), 15 ms (above 20 kA)
- The worked example architecture uses a 380 V DC bus
- Topics covered: converter design, UPS bypass, isolation and earthing, DC fault modelling, protection selection
- The gap between breaker test conditions and real fault time constants needs separate treatment in protection selection
Using it in design
- Treat DC architecture as an expert-mode option and attach a mandatory protection-study flag
- Record the DC fault time constant as an input to breaker selection
- State whether the bus is regulated or unregulated and verify the load voltage window accordingly
- Re-check the earthing and isolation scheme independently of AC-era assumptions
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Who should read it
Electrical design engineers and protection specialists evaluating low-voltage DC distribution.
Related standards
- IEC 60947-2
- IEC 60364-4-41
- ETSI EN 300 132-3
Publication details
- Authors
- Eric L. Brun; Malik Megdiche; Patrick Chambon; Stuart Sheehan; Xu Yuan
- Publisher
- Schneider Electric
- Year
- 2023
- Document number
- WP 47
- Document language
- English
- Source type
- Manufacturer
- Access
- Free to read
- Licence
- Copyright retained; citation only — the publisher’s terms apply to the original document
Citation
Eric L. Brun; Malik Megdiche; Patrick Chambon; Stuart Sheehan; Xu Yuan (2023). Necessary Considerations for Designing DC Architectures in Data Centers. Schneider Electric. WP 47. https://download.schneider-electric.com/files?p_Doc_Ref=SPD_WP47_EN
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